Accounting for the deep Gaussian and tail exponential distribution of the density of states, a physical approximation for potentials of amorphous silicon thin-film transistors using a symmetric dual gate(s DG a-Si:H TFT) has been presented. The proposed scheme provides a complete solution of the potentials at the surface and center of the layer without solving any transcendental equations. A channel current model incorporating features of gate voltage-dependent mobility and coupling factor is derived. We show the parameters required for accurately describing the current–voltage(I–V) characteristics of DG a-Si:H TFT and just how sensitively these parameters affect TFT current. Particularly, the parameters' dependence on the I–V characteristics with respect to the density of deep state and channel thickness has been investigated in detail. The resulting scheme and model are successively verified through comparison with numerical simulations as well as the available experimental data.
Si-doped zinc oxide(SZO) thin films are deposited by using a co-sputtering method,and used as the channel active layers of ZnO-based TFTs with single and dual active layer structures.The effects of silicon content on the optical transmittance of the SZO thin film and electrical properties of the SZO TFT are investigated.Moreover,the electrical performances and bias-stress stabilities of the single- and dual-active-layer TFTs are investigated and compared to reveal the effects of the Si doping and dual-active-layer structure.The average transmittances of all the SZO films are about 90% in the visible light region of 400 nm-800 nm,and the optical band gap of the SZO film gradually increases with increasing Si content.The Si-doping can effectively suppress the grain growth of ZnO,revealed by atomic force microscope analysis.Compared with that of the undoped ZnO TFT,the off-state current of the SZO TFT is reduced by more than two orders of magnitude and it is 1.5 × 10^(-12) A,and thus the on/off current ratio is increased by more than two orders of magnitude.In summary,the SZO/ZnO TFT with dual-active-layer structure exhibits a high on/off current ratio of 4.0 × 10~6 and superior stability under gate-bias and drain-bias stress.
The positive gate-bias temperature instability of a radio frequency(RF) sputtered ZnO thin-film transistor(ZnO TFT)is investigated. Under positive gate-bias stress, the saturation drain current and OFF-state current decrease, and the threshold voltage shifts toward the positive direction. The stress amplitude and stress temperature are considered as important factors in threshold-voltage instability, and the time dependences of threshold voltage shift under various bias temperature stress conditions could be described by a stretched-exponential equation. Based on the analysis of hysteresis behaviors in current–voltage and capacitance–voltage characteristics before and after the gate-bias stress, it can be clarified that the thresholdvoltage shift is predominantly attributed to the trapping of negative charge carriers in the defect states located at the gate–dielectric/channel interface.
