A dual conduction paths segmented anode lateral insulated-gate bipolar transistor （DSA-LIGBT） which uses triple reduced surface field （RESURF） technology is proposed. Due to the hybrid structures of triple RESURF LDMOS （T-LDMOS） and traditional LIGBT, firstly, a wide p-type anode is beneficial to the small shift voltage （VST） and low specific on-resistance （Ron,sp） when the anode voltage （VA） is larger than VST. Secondly, a wide n-type anode and triple RESURF technology are used to get a low Ron,sp when VA is less than VST. Meanwhile, it can accelerate the extraction of electrons, which brings a low turn-off time （Toff）. Experimental results show that： VST is only 0.9 V, Ron,sp （Ron × Area） are 11.7 and 3.6 Ω · mm^2 when anode voltage VA equals 0.9 and 3 V, respectively, the breakdown voltage reaches to 800 V and Toff is only 450 ns.
An analytical model for a novel triple reduced surface field（RESURF） silicon-on-insulator（SOI） lateral doublediffused metal–oxide–semiconductor（LDMOS） field effect transistor with n-type top（N-top） layer, which can obtain a low on-state resistance, is proposed in this paper. The analytical model for surface potential and electric field distributions of the novel triple RESURF SOI LDMOS is presented by solving the two-dimensional（2D） Poisson＇s equation, which can also be applied to single, double and conventional triple RESURF SOI structures. The breakdown voltage（BV） is formulized to quantify the breakdown characteristic. Besides, the optimal integrated charge of N-top layer（Q_（ntop）） is derived, which can give guidance for doping the N-top layer. All the analytical results are well verified by numerical simulation results,showing the validity of the presented model. Hence, the proposed model can be a good tool for the device designers to provide accurate first-order design schemes and physical insights into the high voltage triple RESURF SOI device with N-top layer.
