A low power mapping algorithm for technology independent AND/XOR circuits is proposed. In this algorithm, the average power of the static mixed-polarity Reed-Muller （MPRM） circuits is minimized by generating a two-input gates circuit to optimize the switching active of nodes, and the power and area of MPRM circuits are estimated by using gates from a given library. On the basis of obtaining an optimal power MPRM circuit, the best mixed-polarity is found by combining an exhaustive searching method with polarity conversion algorithms. Our experiments over 18 benchmark circuits show that compared to the power optimization for fixed-polarity Reed-Muller circuits and AND/OR circuits, power saving is up to 44.22% and 60.09%, and area saving is up to 14.13% and 32.72%, respectively.
For an n-variable logic function,the power dissipation and area of the REED-MULLER （RM） circuit corresponding to each polarity are different. Based on the propagation algorithm of signal probability,the decomposition algorithm of a multi-input XOR/AND gate,and the multiple segment algorithm of polarity conversion,this paper successfully applies the whole annealing genetic algorithm （WAGA） to find the best polarity of an RM circuit. Through testing eight large-scale circuits from the Microelectronics Center North Carolina （MCNC） Benchmark, the SYNOPSYS synthesis results show that the RM circuits corresponding to the best polarity found using the proposed algorithm attain average power,area,and max delay savings of 77.2% ,62.4% ,and 9.2% respectively,compared with those under polarity 0.
