本文提出一种基于脉宽收缩和累积寄存器的片上时钟抖动测试电路,用于监测片上时钟信号的抖动,测量精度可达到亚门级.该测试电路是由脉宽收缩环路、累积寄存器、异或阵列、计数器和控制电路组成的.以环形方式连接脉宽收缩单元,可减小由于工艺波动带来的影响,节省面积开销.在监测模式下,累积寄存器同时记录多个时钟周期脉宽的测量结果,并以数字序列码的形式输出,能够直观地显示时钟的抖动.该电路是采用65 nm CMOS工艺设计的,仿真结果表明该电路可测量数GHz的时钟信号,测量精度为1 ps.
A refinement of an analytical approximation of the surface potential in MOSFETs is proposed by introducing a high-order term. As compared to the conventional treatment with accuracy between 1nV and 0. 03mV in the cases with an oxide thickness tox = 1 ～ 10nm and substrate doping concentration Na = 1015 ～ 1018 cm-3 , this method yields an accuracy within about 1pV in all cases. This is comparable to numerical simulations, but does not require trading off much computation efficiency. More importantly, the spikes in the error curve associated with the traditional treatment are eliminated.
针对纳米PMOS器件超浅结工艺面临的硼扩散问题,开展了预非晶化与激光退火和碳共注入结合的超浅结实验,通过透射式电子显微镜(TEM),二次离子质谱(SIMS),扩展电阻法(SRP)等测试对超浅结特性进行评估。结果表明,采用激光退火和碳共注入的方式可有效抑制硼扩散和减小结深。锗预非晶化后5 ke V,1×10^(15)/cm^2条件下注入的硼在激光退火(波长532 nm、脉冲宽度小于20 ns、能量密度0.25 J/cm^2)中的再扩散量非常小,退火后结深较注入结深仅增加6 nm,但激活率仅为24%。相同的硼掺杂条件下采用碳的共注入,常规快速热退火下的结深较未注碳样品减小49%,而且实现了84%的硼激活率。在单项实验基础上,进一步将预非晶化和碳共注入技术应用于纳米尺度器件制作,实验制备了亚50 nm PMOS器件,器件在Vdd=-1.2 V时的电流开关比大于104,亚阈值斜率为100 m V/dec,漏致势垒降低(DIBL)值为104 m V/V。
