A 1.575 GHz CMOS （complementary metal-oxidesemiconductor transistor） low noise amplifier（LNA） suitable for a low intermediate frequency（IF） global positioning system（GPS） receiver is presented. Considering parasitic effects resulting from bond pad and input electrostatic discharge （ESD） protection diodes, the optimization of the input matching and noise performance is analyzed, and a narrowband inductor model is applied to the circuit design and optimization. Based on the Volterra series, the nonlinearity of the LNA is analyzed and an equation describing input-referred third-order intercept points （IIP3） which indicate the nonlinearity effects is derived; accordingly, the trade-off between the power consumption and linearity is made. The LNA is designed and simulated with TSMC （Taiwan Semiconductor Manufacturing Company） 0. 18 μm radio frequency （RF）technology. Simulation results show that the LNA has a noise figure of only 1.1 dB, - 8. 3 dBm IIP3 with 3 mA current consumption from a 1.8 V voltage supply, and the input impedances match well.
