It is predicted that CMOS technology will probably enter into 22 nm node around 2012. Scaling of CMOS logic technology from 32 to 22 nm node meets more critical issues and needs some significant changes of the technology, as well as integration of the advanced processes. This paper will review the key processing technologies which can be potentially integrated into 22 nm and beyond technology nodes, including double patterning technology with high NA water immersion lithography and EUV lithography, new device architectures, high K/metal gate (HK/MG) stack and integration technology, mobility enhancement technologies, source/drain engineering and advanced copper interconnect technology with ultra-low-k process.
This paper mainly reports the permanent impact of displacement damage induced by heavy-ion strikes on the deep-submicron MOSFETs.Upon the heavy ion track through the device,it can lead to displacement damage,including the vacancies and the interstitials.As the featured size of device scales down,the damage can change the dopant distribution in the channel and source/drain regions through the generation of radiation-induced defects and thus have significant impacts on their electrical characteristics.The measured results show that the radiation-induced damage can cause DC characteristics degradations including the threshold voltage,subthreshold swing,saturation drain current,transconductance,etc.The radiation-induced displacement damage may become the dominant issue while it was the secondary concern for the traditional devices after the heavy ion irradiation.The samples are also irradiated by Co-60 gamma ray for comparison with the heavy ion irradiation results.Corresponding explanations and analysis are discussed.
